报告题目：3D integration - state-of-the-art and future outlook

报告人：Jagiellonian University大学Maciej Ogorzalek教授

报告时间：3月23日下午16点

报告地点：线上会议（ZOOM）Meeting ID: 939 7434 4396; Passcode: 096877

报告摘要：Integrated circuits are omnipresent. We not only use mobile phones, personal computers but we are surrounded by systems whose operation highly depends on advances sensors, processing systems, controllers etc. such as home appliances, cars, smart cards, smart energy systems, bio-medical equipment, smart offices, transportation systems and many others. There are more and more new applications appearing in the picture with enormous data flows to deal with and process for our advantage. Artificial Intelligence (AI) and specifically Deep Learning in various domains of applications. For these new envisaged applications including Artificial Intelligence and Deep Learning we will need electronic systems with much improved, maybe 1000 times, performance in terms of power consumption, speed of operation and reliability. Data transfer bottleneck, power consumption and scalability become major obstacles to be overcome. As the sizing of transistors in current technologies comes to the atomic distance limitations further development becomes possible by either introduction of new disruptive technologies or changing in geometric arrangements and architectures of the elements and building blocks. Some limitations in microcircuit constructions can be avoided by putting whole building blocks and sub-circuits in stacks. Such an approach allows for more efficient space usage at the same time allowing circuit footprint reduction. New routing solutions offer very significant wire-length reductions thus reducing power dissipations and signal delays. 3D integration looks as a fantastic area of development, however, there are many new challenges and problems to be solved for the next generation of nano systems. 3D integration offers also unprecedented opportunities by allowing blocks fabricated in heterogeneous technologies to be integrated in one chip. This allows for stacking and integration of microprocessors, memories, RF circuitry, sensors, batteries and hyper-capacitors, energy harvesting blocks, biological and chemical sensors and many new types of building blocks in one chip. We already see wonder constructions of memory chips having 64, 96 and targeting 144 stacked layers. However innovation is needed for new developments. AI acceleration requires still better solutions! In this lecture we will present the state of-the-art and an outlook with commentaries what kind of new solutions might be needed.

报告人简介：

MACIEJ J. OGORZALEK is Professor and Head of the Department of Information Technologies, Jagiellonian University Krakow, Poland. He held many visiting positions in Switzerland, US, Spain, Japan, Germany. Between 2006-2009 he held the Chair of Biosignals and Systems, Hong Kong Polytechnic University under the Distinguished Scholars Scheme. In 2019 he was visiting professor at the Integrated Systems Laboratory at EPFL. Author or co-author of over 380 papers published in journals and conference proceedings and a book Chaos and Complexity in Nonlinear Electronic Circuits. He gave over 60 plenary and keynote lectures at major conferences world-wide. He served as Editor-in-Chief of the IEEE Circuits and Systems Magazine (2004-2007), member of the editorial boards of the IEEE Transactions on Circuits and Systems Part I, Proceedings of the IEEE, International Journal of Bifurcation and Chaos, International Journal of Circuit Theory and Applications also the NOLTA Journal IEICE Japan. Dr. Ogorzalek is IEEE Fellow (1997). He was IEEE 2008 Circuits and Systems Society President. He served as IEEE Division 1 Director, Member of the IEEE Board of Directors (2016-2017). He is Member of the Polish Academy of Sciences (PAN) and Member of the European Academy of Sciences (Academia Europaea).